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Paul Scherrer Institut PSI DRS Chip Documentation

Paul Scherrer Institut
5232 Villigen PSI, Schweiz/Switzerland
Tel. +41 56 310 21 11
Fax. +41 56 310 21 99



Updated:
22.09.2009
E-Mail: stefan.ritt@psi.ch


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DRS4 Evaluation Board

In order to get used to the DRS4 chip, we offer an evaluation board. This board contains following components:

  • Four 50-Ohm terminated input channels with SMA connectors
  • Passive transformers to generate differential signals. These transformers limit the analog bandwidth of the board to about 220 MHz.
  • High bandwidth analog switches for calibration
  • One DRS4 chip
  • One AD9245 ADC to digitize signals from the DRS4 chip
  • One Xilinx Spartan 3 FPGA for readout control
  • A 16-bit DAC to generate all on-board control voltages
  • A serial EEPROM containing serial number and calibration information
  • An external trigger input (TTL input 50 Ohm terminated) with LEMO 00 connector
  • An on-board comparator for internal triggering
  • A USB 2.0 interface for data readout. This interface also powers this board.
  • Several headers for debugging of all important control signals with an oscilloscipe or logic analyzer

By using channel cascading, the DRS4 chip offers four channels with 2048 bins for each channel. The on-board comparator enables the board to do a self-triggering on a programmed level of any of the input channels, much like an oscilloscope. Using the USB 2.0 interface, the evaluation board can be controlled and read out very quickly. See the Software Download section for the drivers, firmware and applications for this board.